budvin.edippuliarachchi@tufts.edu
I am a PhD candidate and a graduate research assistant at the Department of Computer Science , Tufts University. I am supervised by Prof. Hari Sundar. Before that, I received my bachelor’s degree from Department of Computer Science & Engineering , University of Moratuwa, Sri Lanka.
My research spans several areas of high performance scientific computing:
Overall, I am interested in developing and optimizing numerical methods and solvers that harness the performance of modern hardware and software architectures.
PhD in Computer Science (2023 - present)
Tufts University. Advised by Prof. Hari Sundar.
MSc in Computer Science (2026)
Tufts University
BSc (Hons) in Computer Science & Engineering (2022)
University of Moratuwa, Sri Lanka. CGPA 4.12/4.2, ranked 1st among 128 students.
The Cornell, Maryland, Max Planck Pre-doctoral Research School (August 2022)
Max Planck Institute for Software Systems, Saarbrücken, Germany.
Given the popularity and recent advancements in MLIR-based compiler stacks
(commonly used in AI/ML workflows), we propose direct MLIR code generation from
a user-specified specification for solving Partial Differential Equations using
the Finite Element Method. This approach heavily benefits from the existing
optimizations implemented in MLIR compilers (e.g., IREE) while maintaining performance
on different hardware backends (NVIDIA GPU, AMD GPU, x86 CPU, ARM CPU). This
framework is planned to support multivariable, multiphysics scenarios where
the domain experts can quickly and efficiently test new physics models.
Ongoing work
While all of the literature on optimizing the Sparse Matrix-Vector Multiplication
(SpMV) focus on general matrices, we introduce a provable index compression scheme
for sparse matrices generated by Finite Element Method assembly. We use a domain
decomposition scheme to decompose the SpMV operator into cluster-wise local
operators which can be compressed using smaller width integers. We prove that
the compression is net positive for the low polynomial order FEM use cases. Optimized SpMV
using this new encoding achieves up to 1.7x speedup over SOTA SpMV kernels on NVIDIA
GPUs and up to 2x speedup on Intel MKL on x86 CPU.
Accepted to the Student Research Competition at the 2026 International
Conference for High Performance Computing, Networking, Storage and Analysis (SC ‘26)
Full paper pending review.
Collaborative research with TuPL for creating a verified code
generation framework for Finite Element solvers. We formalize translating FEM
weak-form into automatically generated backend code to perform quadrature rule
based element-wise integration while ensuring semantic preservation. We use Lean
theorem prover for the implementation. This framework will serve as a
machine-checkable specification for practical FEM frameworks and provide foundation
for verified PDE solvers.
Ongoing work
AMRaCut bridges the scalable performance gap between Space Filling Curve based partitioners
and Graph based multi-level partitioners for mesh partitioning in distributed environments.
AMRaCut achieves 5-10x speedup over multi-level partitioners (ParMETIS, PT-Scotch)
on 20,000+ distributed cores while
maintaining maximum partition load within 1.5-2x of optimal, sufficient for
distributed scalability of downstream tasks.
Published in The International Conference for High Performance Computing, Networking, Storage and Analysis (SC ‘25)
Profiling the new software suite ALICE O2 developed by CERN for their Run 3. Research involves executing sample workflows, profiling them with memory and CPU profiling tools to identify potential bottlenecks.
Developing an efficient k-mer counting framework specifically tailored for
commodity clusters (low-end computer networks, university computer labs) which
do not possess high performance networks or file systems. We propose a master-worker
approach where dataset reading is performed in the master node and k-mer counting takes
place in the worker nodes. The complete workflow is pipelined using thread level producer-
consumer approach, accounting for dynamic load balance across worker nodes.
Published in Proceedings of the 14th International Conference on Bioinformatics and Biomedical Technology (ICBBT ‘22)
Budvin Edippuliarachchi, David Van Komen, and Hari Sundar. 2025. AMRaCut: Scalable Partitioning for Adaptive Mesh Refinement. In The International Conference for High Performance Computing, Networking, Storage and Analysis (SC ‘25).
Budvin Edippuliarachchi, Damika Gamlath, Ruchin Amaratunga, Gunavaran Brihadiswaran, and Sanath Jayasena. 2022. Quill: A Memory Efficient k-mer Counting and k-mer Querying Tool for Commodity Clusters. In Proceedings of the 14th International Conference on Bioinformatics and Biomedical Technology (ICBBT ‘22).
Gold Medal - Dept. of Computer Science and Engineering, Univ. of Moratuwa (2022)
Awarded for achieving the best overall GPA for computer science specialization.
Dean’s List - University of Moratuwa (2017-2021)
For all consecutive semesters
Champions - Aces Coders v8.0 (2020)
One of the largest competitive programming competitions in Sri Lanka which is organized by the University of
Peradeniya.
Top 100 - IEEEXtreme (2021, 2020)
IEEEXtreme 14.0 (2021) - Global Rank 71st
IEEEXtreme 13.0 (2020) - Global Rank 92nd
Champions - UoJ Coders (2019)
12-hr competitive programming competition organized by the University of Jaffna.
1st Runners-Up - RealHack (2019)
Overnight hackathon preceded by a competitive programming round, organized by the University of Kelaniya.
Finalists - Robofest (2018, 2019) and Sri Lanka Robotics Competition (2018)
Built micromouse robots to solve the classic maze challenge.
Bronze Medalist - Sri Lanka Mathematics Olympiad - Junior (2008)
Preliminary mathematics olympiad round held in Sri Lanka to qualify for the International Mathematics
Olympiad competition.
Software Engineer - Expert Intelligence (2023)
Cloud infrastructure automation and full stack development.
Founding Member, Backend Engineer & DevOps Consultant - IXD Labs (2021-2023)
Backend development and cloud infrastructure management for web based products and services.
Software Engineering Intern - Mitra Innovation (2020, 2021)
6 month software engineering internship covering AWS services, event driven software design, multi-tenant architecture, real-time data streaming, performance optimization in web apps and 3D animations with vector mathematics.
Graduate Teaching Assistant - Tufts University (2025)
CS40 - Machine Structure & Assembly Language Programming
Teaching Assistant - University of Moratuwa (2021, 2022)
CS3062 - Theory of Computing
CS2022 - Data Structures and Algorithms
CS1033 - Programming Fundamentals
Fields: HPC, Distributed & Parallel Computing, Compilers (MLIR), Algorithms, Backend Development, AWS Cloud
Languages: C, C++, Python, Julia, Java, SQL, JavaScript
Step Up - Introduction to Algorithms (2022)
Step Up is a technical workshop organized by the IEEE Student Branch of the University of Jaffna. This workshop mainly focuses on Competitive Programming and making students aware of Data Structures and Algorithms.
Prolog To XTREME 15.0 (2021)
A virtual webinar hosted by The IEEE Student Branch of the University of Jaffna, focusing on Algorithms & Data Structures for the IEEEXtreme 15.0 coding competition with the purpose of guiding students and sharing tips and tricks for solving the problems.
CodeSolveur (2021)
Organized by the IEEE Student Branch of General Sir John Kotelawala Defence University in collaboration with the IEEEXtreme Sri Lanka Section to enhance the knowledge of KDU undergraduates on competitive programming. During this session mainly the techniques of competitive programming such as divide and conquer, dynamic programming and greedy approach were discussed.